 84d9c625bf
			
		
	
	
		84d9c625bf
		
	
	
	
	
		
			
			- Fix for possible unset uid/gid in toproto
 - Fix for default mtree style
 - Update libelf
 - Importing libexecinfo
 - Resynchronize GCC, mpc, gmp, mpfr
 - build.sh: Replace params with show-params.
     This has been done as the make target has been renamed in the same
     way, while a new target named params has been added. This new
     target generates a file containing all the parameters, instead of
     printing it on the console.
 - Update test48 with new etc/services (Fix by Ben Gras <ben@minix3.org)
     get getservbyport() out of the inner loop
Change-Id: Ie6ad5226fa2621ff9f0dee8782ea48f9443d2091
		
	
			
		
			
				
	
	
		
			190 lines
		
	
	
		
			6.0 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			190 lines
		
	
	
		
			6.0 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
| /*	$NetBSD: modf.S,v 1.5 2013/09/12 15:36:16 joerg Exp $	*/
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| 
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| /*
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|  * Copyright (c) 1992, 1993
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|  *	The Regents of the University of California.  All rights reserved.
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|  *
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|  * This software was developed by the Computer Systems Engineering group
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|  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
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|  * contributed to Berkeley.
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|  *
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|  * Redistribution and use in source and binary forms, with or without
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|  * modification, are permitted provided that the following conditions
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|  * are met:
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|  * 1. Redistributions of source code must retain the above copyright
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|  *    notice, this list of conditions and the following disclaimer.
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|  * 2. Redistributions in binary form must reproduce the above copyright
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|  *    notice, this list of conditions and the following disclaimer in the
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|  *    documentation and/or other materials provided with the distribution.
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|  * 3. Neither the name of the University nor the names of its contributors
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|  *    may be used to endorse or promote products derived from this software
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|  *    without specific prior written permission.
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|  *
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|  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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|  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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|  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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|  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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|  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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|  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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|  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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|  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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|  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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|  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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|  * SUCH DAMAGE.
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|  *
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|  * from: Header: modf.s,v 1.3 92/06/20 00:00:54 torek Exp
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|  */
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| 
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| #include <machine/asm.h>
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| #if defined(LIBC_SCCS) && !defined(lint)
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| #if 0
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| 	.asciz "@(#)modf.s	8.1 (Berkeley) 6/4/93"
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| #else
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| 	RCSID("$NetBSD: modf.S,v 1.5 2013/09/12 15:36:16 joerg Exp $")
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| #endif
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| #endif /* LIBC_SCCS and not lint */
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| 
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| #include <machine/fsr.h>
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| 
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| /*
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|  * double modf(double val, double *iptr)
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|  *
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|  * Returns the fractional part of `val', storing the integer part of
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|  * `val' in *iptr.  Both *iptr and the return value have the same sign
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|  * as `val'.
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|  *
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|  * Method:
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|  *
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|  * We use the fpu's normalization hardware to compute the integer portion
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|  * of the double precision argument.  Sun IEEE double precision numbers
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|  * have 52 bits of mantissa, 11 bits of exponent, and one bit of sign,
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|  * with the sign occupying bit 31 of word 0, and the exponent bits 30:20
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|  * of word 0.  Thus, values >= 2^52 are by definition integers.
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|  *
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|  * If we take a value that is in the range [+0..2^52) and add 2^52, all
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|  * of the fractional bits fall out and all of the integer bits are summed
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|  * with 2^52.  If we then subtract 2^52, we get those integer bits back.
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|  * This must be done with rounding set to `towards 0' or `towards -inf'.
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|  * `Toward -inf' fails when the value is 0 (we get -0 back)....
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|  *
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|  * Note that this method will work anywhere, but is machine dependent in
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|  * various aspects.
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|  *
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|  * Stack usage:
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|  *	4@[%fp + BIAS - 4]	saved %fsr
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|  *	4@[%fp + BIAS - 8]	new %fsr with rounding set to `towards 0'
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|  *	8@[%fp + BIAS - 16]	space for moving between %i and %f registers
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|  * Register usage:
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|  *	%f0:f1		double val;
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|  *	%l0		scratch
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|  *	%l1		sign bit (0x80000000)
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|  *	%i1		double *iptr;
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|  *	%f2:f3		`magic number' 2^52, in fpu registers
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|  *	%f4:f5		double v, in fpu registers
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|  *	%f6:f7		double temp.
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|  */
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| 
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| 	.align	8
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| Lmagic:
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| 	.word	0x43300000	! sign = 0, exponent = 52 + 1023, mantissa = 0
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| 	.word	0		! (i.e., .double 0r4503599627370496e+00)
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| 
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| L0:
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| 	.word	0		! 0.0
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| 	.word	0
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| 
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| ENTRY(modf)
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| 	save	%sp, -CC64FSZ-16, %sp
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| 
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| 	/*
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| 	 * First, compute v = abs(val)
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| 	 */
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| 	fabsd	%f0, %f4		! %f4:f5 = v
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| 	fcmped	%fcc1, %f0, %f4		! %fcc1 = (val == abs(val))
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| #ifdef __PIC__
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| 	PICCY_SET(Lmagic, %l0, %o7)
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| 	ldd	[%l0], %f2
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| #else
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| 	sethi	%hi(Lmagic), %l0
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| 	ldd	[%l0 + %lo(Lmagic)], %f2
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| #endif
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| 
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| 	/*
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| 	 * Is %f4:f5 >= %f2:f3 ?  If so, it is all integer bits.
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| 	 * It is probably less, though.
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| 	 */
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| 	fcmped	%f4, %f2
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| 	fbuge	Lbig			! if >= (or unordered), go out
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| 	nop
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| 
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| 	/*
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| 	 * v < 2^52, so add 2^52, then subtract 2^52, but do it all
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| 	 * with rounding set towards zero.  We leave any enabled
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| 	 * traps enabled, but change the rounding mode.  This might
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| 	 * not be so good.  Oh well....
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| 	 */
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| 	st	%fsr, [%fp + BIAS - 4]	! %l5 = current FSR mode
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| 	set	FSR_RD, %l3		! %l3 = rounding direction mask
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| 	ld	[%fp + BIAS - 4], %l5
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| 	set	FSR_RD_RZ << FSR_RD_SHIFT, %l4
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| 	andn	%l5, %l3, %l6
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| 	or	%l6, %l4, %l6		! round towards zero, please
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| 	and	%l5, %l3, %l5		! save original rounding mode
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| 	st	%l6, [%fp + BIAS - 8]
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| 	ld	[%fp + BIAS - 8], %fsr
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| 
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| 	faddd	%f4, %f2, %f4		! %f4:f5 += 2^52
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| 	fsubd	%f4, %f2, %f4		! %f4:f5 -= 2^52
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| 
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| 	/*
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| 	 * Restore %fsr, but leave exceptions accrued.
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| 	 */
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| 	st	%fsr, [%fp + BIAS - 4]
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| 	ld	[%fp + BIAS - 4], %l6
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| 	andn	%l6, %l3, %l6		! %l6 = %fsr & ~FSR_RD;
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| 	or	%l5, %l6, %l5		! %l5 |= %l6;
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| 	st	%l5, [%fp + BIAS - 4]
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| 	ld	[%fp + BIAS - 4], %fsr	! restore %fsr, leaving accrued stuff
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| 
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| 	/*
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| 	 * Now insert the original sign in %f4:f5.
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| 	 * %fcc1 should still have the reults of (val == abs(val))
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| 	 * from above, so we use a conditional move on %fcc1 to: 
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| 	 *
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| 	 *	%f4 = (val == abs(val)) ? %f4 : -%f4
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| 	 *
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| 	 */
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| 	fnegd	%f4, %f6
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| 	fmovdnz	%fcc1, %f6, %f4
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| 1:
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| 
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| 	/*
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| 	 * The value in %f4:f5 is now the integer portion of the original
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| 	 * argument.  We need to store this in *ival (%i1), subtract it
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| 	 * from the original value argument (%d0), and return the result.
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| 	 */
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| 	std	%f4, [%i1]		! *ival = %f4:f5;
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| 	fsubd	%f0, %f4, %f0		! %f0:f1 -= %f4:f5;
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| 	ret
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| 	restore
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| 
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| Lbig:
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| 	/*
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| 	 * We get here if the original comparison of %f4:f5 (v) to
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| 	 * %f2:f3 (2^52) came out `greater or unordered'.  In this
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| 	 * case the integer part is the original value, and the
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| 	 * fractional part is 0.
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| 	 */
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| #ifdef __PIC__
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| 	PICCY_SET(L0, %l0, %o7)
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| 	std	%f0, [%i1]		! *ival = val;
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| 	ldd	[%l0], %f0		! return 0.0;
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| #else
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| 	sethi	%hi(L0), %l0
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| 	std	%f0, [%i1]		! *ival = val;
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| 	ldd	[%l0 + %lo(L0)], %f0	! return 0.0;
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| #endif
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| 	ret
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| 	restore
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| 
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