8a44a44cb9
- local APIC timer used as the source of time - PIC is still used as the hw interrupt controller as we don't have enough info without ACPI or MPS to set up IO APICs - remapping of APIC when switching paging on, uses the new mechanism to tell VM what phys areas to map in kernel's virtual space - one more step to SMP based on code by Arun C.
106 lines
3.1 KiB
C
106 lines
3.1 KiB
C
#ifndef __APIC_H__
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#define __APIC_H__
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#define LOCAL_APIC_DEF_ADDR 0xfee00000 /* default local apic address */
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#define IO_APIC_DEF_ADDR 0xfec00000 /* default i/o apic address */
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#define LAPIC_ID (lapic_addr + 0x020)
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#define LAPIC_VERSION (lapic_addr + 0x030)
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#define LAPIC_TPR (lapic_addr + 0x080)
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#define LAPIC_EOI (lapic_addr + 0x0b0)
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#define LAPIC_LDR (lapic_addr + 0x0d0)
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#define LAPIC_DFR (lapic_addr + 0x0e0)
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#define LAPIC_SIVR (lapic_addr + 0x0f0)
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#define LAPIC_ESR (lapic_addr + 0x280)
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#define LAPIC_ICR1 (lapic_addr + 0x300)
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#define LAPIC_ICR2 (lapic_addr + 0x310)
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#define LAPIC_LVTTR (lapic_addr + 0x320)
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#define LAPIC_LVTTMR (lapic_addr + 0x330)
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#define LAPIC_LVTPCR (lapic_addr + 0x340)
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#define LAPIC_LINT0 (lapic_addr + 0x350)
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#define LAPIC_LINT1 (lapic_addr + 0x360)
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#define LAPIC_LVTER (lapic_addr + 0x370)
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#define LAPIC_TIMER_ICR (lapic_addr + 0x380)
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#define LAPIC_TIMER_CCR (lapic_addr + 0x390)
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#define LAPIC_TIMER_DCR (lapic_addr + 0x3e0)
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#define IOAPIC_ID 0x0
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#define IOAPIC_VERSION 0x1
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#define IOAPIC_ARB 0x2
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#define IOAPIC_REDIR_TABLE 0x10
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#define APIC_TIMER_INT_VECTOR 0xfe
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#define APIC_SPURIOUS_INT_VECTOR 0xff
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#ifndef __ASSEMBLY__
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#include "../../kernel.h"
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EXTERN int ioapic_enabled;
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EXTERN u32_t lapic_addr;
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EXTERN u32_t lapic_eoi_addr;
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EXTERN u32_t lapic_taskpri_addr;
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EXTERN int bsp_lapic_id;
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#define MAX_NR_IOAPICS 32
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#define MAX_NR_BUSES 32
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#define MAX_NR_APICIDS 255
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#define MAX_NR_LCLINTS 2
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EXTERN u8_t apicid2cpuid[MAX_NR_APICIDS+1];
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EXTERN unsigned apic_imcrp;
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EXTERN unsigned nioapics;
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EXTERN unsigned nbuses;
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EXTERN unsigned nintrs;
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EXTERN unsigned nlints;
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EXTERN u32_t ioapic_id_mask[8];
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EXTERN u32_t lapic_id_mask[8];
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EXTERN u32_t lapic_addr_vaddr; /* we remember the virtual address here until we
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switch to paging */
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EXTERN u32_t lapic_addr;
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EXTERN u32_t lapic_eoi_addr;
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EXTERN u32_t lapic_taskpri_addr;
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_PROTOTYPE (void calc_bus_clock, (void));
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_PROTOTYPE (u32_t lapic_errstatus, (void));
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/*
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_PROTOTYPE (u32_t ioapic_read, (u32_t addr, u32_t offset));
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_PROTOTYPE (void ioapic_write, (u32_t addr, u32_t offset, u32_t data));
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_PROTOTYPE (void lapic_eoi, (void));
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*/
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_PROTOTYPE (void lapic_microsec_sleep, (unsigned count));
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_PROTOTYPE (void smp_ioapic_unmask, (void));
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_PROTOTYPE (void ioapic_disable_irqs, (u32_t irq));
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_PROTOTYPE (void ioapic_enable_irqs, (u32_t irq));
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_PROTOTYPE (u32_t ioapic_irqs_inuse, (void));
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_PROTOTYPE (void smp_recv_ipi, (int arg));
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_PROTOTYPE (void ioapic_config_pci_irq, (u32_t data));
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_PROTOTYPE (int lapic_enable, (void));
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_PROTOTYPE (void lapic_disable, (void));
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_PROTOTYPE (void ioapic_disable_all, (void));
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_PROTOTYPE (int ioapic_enable_all, (void));
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_PROTOTYPE(void apic_idt_init, (int reset));
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_PROTOTYPE(int apic_single_cpu_init, (void));
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_PROTOTYPE(void lapic_set_timer_periodic, (unsigned freq));
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_PROTOTYPE(void lapic_stop_timer, (void));
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#include <minix/cpufeature.h>
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#define cpu_feature_apic_on_chip() _cpufeature(_CPUF_I386_APIC_ON_CHIP)
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#define lapic_read(what) (*((u32_t *)((char*)(what))))
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#define lapic_write(what, data) do { \
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(*((u32_t *)((char*)(what)))) = data; \
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} while(0)
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#endif /* __ASSEMBLY__ */
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#endif /* __APIC_H__ */
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