1cd76c7513
. primary purpose is to synchronize with <ieeefp.h> which expects a fp_prec from sys/arch/x86/include/ieeefp.h
224 lines
6.9 KiB
C
224 lines
6.9 KiB
C
/* $NetBSD: smbiosvar.h,v 1.3 2008/04/16 16:06:51 cegger Exp $ */
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/*
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* Copyright (c) 2006 Gordon Willem Klok <gklok@cogeco.ca>
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* Copyright (c) 2005 Jordan Hargrave
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _I386_SMBIOSVAR_
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#define _I386_SMBIOSVAR_
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#define SMBIOS_START 0xf0000
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#define SMBIOS_END 0xfffff
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#define SMBIOS_UUID_NPRESENT 0x1
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#define SMBIOS_UUID_NSET 0x2
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/*
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* Section 3.5 of "UUIDs and GUIDs" found at
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* http://www.opengroup.org/dce/info/draft-leach-uuids-guids-01.txt
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* specifies the string repersentation of a UUID.
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*/
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#define SMBIOS_UUID_REP "%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x"
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#define SMBIOS_UUID_REPLEN 37 /* 16 zero padded values, 4 hyphens, 1 null */
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struct smbios_entry {
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uint8_t mjr;
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uint8_t min;
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uint8_t *addr;
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uint16_t len;
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uint16_t count;
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};
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struct smbhdr {
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uint32_t sig; /* "_SM_" */
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uint8_t checksum; /* Entry point checksum */
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uint8_t len; /* Entry point structure length */
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uint8_t majrev; /* Specification major revision */
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uint8_t minrev; /* Specification minor revision */
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uint16_t mss; /* Maximum Structure Size */
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uint8_t epr; /* Entry Point Revision */
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uint8_t fa[5]; /* value determined by EPR */
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uint8_t sasig[5]; /* Secondary Anchor "_DMI_" */
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uint8_t sachecksum; /* Secondary Checksum */
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uint16_t size; /* Length of structure table in bytes */
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uint32_t addr; /* Structure table address */
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uint16_t count; /* Number of SMBIOS structures */
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uint8_t rev; /* BCD revision */
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} __packed;
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struct smbtblhdr {
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uint8_t type;
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uint8_t size;
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uint16_t handle;
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} __packed;
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struct smbtable {
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struct smbtblhdr *hdr;
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void *tblhdr;
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uint32_t cookie;
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};
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#define SMBIOS_TYPE_BIOS 0
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#define SMBIOS_TYPE_SYSTEM 1
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#define SMBIOS_TYPE_BASEBOARD 2
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#define SMBIOS_TYPE_ENCLOSURE 3
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#define SMBIOS_TYPE_PROCESSOR 4
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#define SMBIOS_TYPE_MEMCTRL 5
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#define SMBIOS_TYPE_MEMMOD 6
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#define SMBIOS_TYPE_CACHE 7
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#define SMBIOS_TYPE_PORT 8
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#define SMBIOS_TYPE_SLOTS 9
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#define SMBIOS_TYPE_OBD 10
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#define SMBIOS_TYPE_OEM 11
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#define SMBIOS_TYPE_SYSCONFOPT 12
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#define SMBIOS_TYPE_BIOSLANG 13
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#define SMBIOS_TYPE_GROUPASSOC 14
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#define SMBIOS_TYPE_SYSEVENTLOG 15
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#define SMBIOS_TYPE_PHYMEM 16
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#define SMBIOS_TYPE_MEMDEV 17
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#define SMBIOS_TYPE_ECCINFO32 18
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#define SMBIOS_TYPE_MEMMAPARRAYADDR 19
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#define SMBIOS_TYPE_MEMMAPDEVADDR 20
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#define SMBIOS_TYPE_INBUILTPOINT 21
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#define SMBIOS_TYPE_PORTBATT 22
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#define SMBIOS_TYPE_SYSRESET 23
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#define SMBIOS_TYPE_HWSECUIRTY 24
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#define SMBIOS_TYPE_PWRCTRL 25
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#define SMBIOS_TYPE_VOLTPROBE 26
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#define SMBIOS_TYPE_COOLING 27
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#define SMBIOS_TYPE_TEMPPROBE 28
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#define SMBIOS_TYPE_CURRENTPROBE 29
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#define SMBIOS_TYPE_OOB_REMOTEACCESS 30
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#define SMBIOS_TYPE_BIS 31
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#define SMBIOS_TYPE_SBI 32
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#define SMBIOS_TYPE_ECCINFO64 33
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#define SMBIOS_TYPE_MGMTDEV 34
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#define SMBIOS_TYPE_MGTDEVCOMP 35
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#define SMBIOS_TYPE_MGTDEVTHRESH 36
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#define SMBIOS_TYPE_MEMCHANNEL 37
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#define SMBIOS_TYPE_IPMIDEV 38
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#define SMBIOS_TYPE_SPS 39
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#define SMBIOS_TYPE_INACTIVE 126
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#define SMBIOS_TYPE_EOT 127
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/*
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* SMBIOS Structure Type 0 "BIOS Information"
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* DMTF Specification DSP0134 Section: 3.3.1 p.g. 34
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*/
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struct smbios_struct_bios {
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uint8_t vendor; /* string */
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uint8_t version; /* string */
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uint16_t startaddr;
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uint8_t release; /* string */
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uint8_t romsize;
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uint64_t characteristics;
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uint32_t charext;
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uint8_t major_rel;
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uint8_t minor_rel;
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uint8_t ecf_mjr_rel; /* embedded controler firmware */
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uint8_t ecf_min_rel; /* embedded controler firmware */
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} __packed;
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/*
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* SMBIOS Structure Type 1 "System Information"
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* DMTF Specification DSP0134 Section 3.3.2 p.g. 35
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*/
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struct smbios_sys {
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/* SMBIOS spec 2.0+ */
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uint8_t vendor; /* string */
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uint8_t product; /* string */
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uint8_t version; /* string */
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uint8_t serial; /* string */
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/* SMBIOS spec 2.1+ */
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uint8_t uuid[16];
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uint8_t wakeup;
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/* SMBIOS spec 2.4+ */
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uint8_t sku; /* string */
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uint8_t family; /* string */
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} __packed;
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/*
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* SMBIOS Structure Type 2 "Base Board (Module) Information"
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* DMTF Specification DSP0134 Section 3.3.3 p.g. 37
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*/
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struct smbios_board {
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uint8_t vendor; /* string */
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uint8_t product; /* string */
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uint8_t version; /* string */
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uint8_t serial; /* string */
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uint8_t asset; /* stirng */
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uint8_t feature; /* feature flags */
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uint8_t location; /* location in chassis */
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uint16_t handle; /* chassis handle */
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uint8_t type; /* board type */
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uint8_t noc; /* number of contained objects */
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} __packed;
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/*
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* SMBIOS Structure Type 9 "Expansion slot"
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*/
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struct smbios_slot {
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uint8_t designation;
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uint8_t type;
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uint8_t width;
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uint8_t usage;
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uint8_t length;
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uint8_t slotid[2];
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uint8_t characteristics[2];
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} __packed;
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#define SMBIOS_SLOT_ISA 0x03
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#define SMBIOS_SLOT_EISA 0x05
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/*
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* SMBIOS Structure Type 38 "IPMI Information"
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* DMTF Specification DSP0134 Section 3.3.39 p.g. 91
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*/
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struct smbios_ipmi {
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uint8_t smipmi_if_type; /* IPMI Interface Type */
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uint8_t smipmi_if_rev; /* BCD IPMI Revision */
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uint8_t smipmi_i2c_address; /* I2C address of BMC */
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uint8_t smipmi_nvram_address; /* I2C address of NVRAM
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* storage */
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uint64_t smipmi_base_address; /* Base address of BMC (BAR
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* format */
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uint8_t smipmi_base_flags; /* Flags field:
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* bit 7:6 : register spacing
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* 00 = byte
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* 01 = dword
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* 02 = word
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* bit 4 : Lower bit BAR
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* bit 3 : IRQ valid
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* bit 2 : N/A
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* bit 1 : Interrupt polarity
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* bit 0 : Interrupt trigger */
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uint8_t smipmi_irq; /* IRQ if applicable */
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} __packed;
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int smbios_find_table(uint8_t, struct smbtable *);
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char *smbios_get_string(struct smbtable *, uint8_t, char *, size_t);
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#endif
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