86 lines
		
	
	
		
			2.8 KiB
		
	
	
	
		
			C
		
	
	
		
			Executable File
		
	
	
	
	
			
		
		
	
	
			86 lines
		
	
	
		
			2.8 KiB
		
	
	
	
		
			C
		
	
	
		
			Executable File
		
	
	
	
	
| /*
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| ibm/cmos.h
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| 
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| Created:	Dec 1998 by Philip Homburg <philip@cs.vu.nl>
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| 
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| Definitions for the CMOS/realtime clock. Based on the datasheet for the
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| Dallas DS12887, compatible with the Motorola MC146818
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| */
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| 
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| #define RTC_INDEX	0x70	/* Bit 7 = NMI enable (1) / disable (0)
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| 				 * bits 0..6 index
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| 				 */
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| #define RTC_IO		0x71	/* Data register, 
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| 				 * Note: the operation following a write to
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| 				 * RTC_INDEX should an access (read or write)
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| 				 * to RTC_IO
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| 				 */
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| 
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| #define RTC_SEC		0x0	/* Seconds register */
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| #define RTC_SEC_ALRM	0x1	/* Seconds register for alarm */
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| #define RTC_MIN		0x2	/* Minutes register */
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| #define RTC_MIN_ALRM	0x3	/* Minutes register for alarm */
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| #define RTC_HOUR	0x4	/* Hours register */
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| #define RTC_HOUR_ALRM	0x5	/* Hours register for alarm */
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| #define RTC_WDAY	0x6	/* Day of the week, 1..7, Sunday = 1 */
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| #define RTC_MDAY	0x7	/* Day of the month, 1..31 */
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| #define RTC_MONTH	0x8	/* Month, 1..12 */
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| #define RTC_YEAR	0x9	/* Year, 0..99 */
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| #define RTC_REG_A	0xA
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| #define		RTC_A_UIP	0x80	/* Update in progress. When clear,
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| 					 * no update will occur for 244
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| 					 * micro seconds.
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| 					 */
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| #define		RTC_A_DV	0x70	/* Divider bits, valid values are: */
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| #define		    RTC_A_DV_OK	    0x20	/* Normal */
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| #define		    RTC_A_DV_STOP   0x70	/* Stop, a re-start starts
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| 						 * halfway through a cycle,
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| 						 * i.e. the update occurs after
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| 						 * 500ms.
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| 						 */
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| #define		RTC_A_RS	0x0F	/* Int. freq */
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| 				    /*  0	None 
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| 				     *  1	 256 Hz
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| 				     *  2	 128 Hz
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| 				     *  3	8192 Hz
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| 				     *  4	4096 Hz
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| 				     *  5	2048 Hz
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| 				     *  6	1024 Hz
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| 				     *  7	 512 Hz
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| 				     *  8	 256 Hz
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| 				     *  9	 128 Hz
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| 				     * 10	  64 Hz
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| 				     * 11	  32 Hz
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| 				     * 12	  16 Hz
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| 				     * 13	   8 Hz
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| 				     * 14	   4 Hz
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| 				     * 15	   2 Hz
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| 				     */
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| #define		    RTC_A_RS_DEF    6	/* Default freq. */
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| #define RTC_REG_B	0xB
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| #define		RTC_B_SET	0x80	/* Inhibit updates */
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| #define		RTC_B_PIE	0x40	/* Enable periodic interrupts */
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| #define		RTC_B_AIE	0x20	/* Enable alarm interrupts */
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| #define		RTC_B_UIE	0x10	/* Enable update ended interrupts */
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| #define		RTC_B_SQWE	0x08	/* Enable square wave output */
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| #define		RTC_B_DM_BCD	0x04	/* Data is in BCD (otherwise binary) */
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| #define		RTC_B_24	0x02	/* Count hours in 24-hour mode */
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| #define		RTC_B_DSE	0x01	/* Automatic (wrong) daylight savings
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| 					 * updates
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| 					 */
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| #define RTC_REG_C	0xC
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| 
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| /* Contents of the general purpose CMOS RAM (source IBM reference manual) */
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| #define CMOS_STATUS	0xE
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| #define		CS_LOST_POWER	0x80	/* Chip lost power */
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| #define		CS_BAD_CHKSUM	0x40	/* Checksum is incorrect */
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| #define		CS_BAD_CONFIG	0x20	/* Bad configuration info */
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| #define		CS_BAD_MEMSIZE	0x10	/* Wrong memory size of CMOS */
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| #define		CS_BAD_HD	0x08	/* Harddisk failed */
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| #define		CS_BAD_TIME	0x04	/* CMOS time is invalid */
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| 					/* bits 0 and 1 are reserved */
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| 
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| /*
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|  * $PchId: cmos.h,v 1.1 1998/12/16 09:14:21 philip Exp $
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|  */
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