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allows to use probe values as test case outputs; closes #562
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@ -8,6 +8,7 @@ HEAD, planned as v0.26
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- Added a "Not Connected" component to output a constant high-z value.
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- If a high-z value is connected to a logic gate input, the read value
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is undefined.
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- It is now possible to use a probe as output in a test case.
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- Fixed a bug in the Demuxer Verilog template that causes problems
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when using multiple demuxers in the same circuit.
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- Generic circuits are easier to debug: It is possible now to create
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@ -56,7 +56,7 @@ public class Probe implements Element {
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@Override
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public void registerNodes(Model model) {
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model.addSignal(new Signal(label, value).setShowInGraph(showInGraph).setFormat(format));
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model.addOutput(new Signal(label, value).setShowInGraph(showInGraph).setFormat(format));
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model.registerGlobalValue(label, value);
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}
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