mirror of
https://github.com/hneemann/Digital.git
synced 2025-09-14 23:36:27 -04:00
first ide config for basic BASYS3 support.
This commit is contained in:
parent
6c2bec3b69
commit
63a3412191
@ -1,15 +1,16 @@
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<ide name="BASYS 3">
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<commands>
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<command name="Export to Vivado" requires="vhdl" filter="false">
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<command name="Export to Vivado" requires="vhdl" filter="true" gui="true" timeout="0">
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<arg>vivado</arg>
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<arg>vivado/<?=shortname?>.xpr</arg>
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</command>
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</commands>
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<files>
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<file name="<?=shortname?>_constraints.xdc" overwrite="true" filter="true">
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<content><![CDATA[<?
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port := 0;
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for (i:=0; i<sizeOf(hdl.ports);i++) {
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port=hdl.ports[i];
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port:=hdl.ports[i];
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if (port.bits=1) {
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print("set_property PACKAGE_PIN "+port.pin+" [get_ports "+port.name+"]\n");
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print("set_property IOSTANDARD LVCMOS33 [get_ports "+port.name+"]\n\n");
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@ -25,7 +26,7 @@ print("set_property CONFIG_VOLTAGE 3.3 [current_design]\n");
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?>]]></content>
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</file>
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<file name="vivado/<?=shortname?>.xpr" overwrite="true" filter="true">
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<file name="vivado/<?=shortname?>.xpr" overwrite="false" filter="true">
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<content><![CDATA[<?print("<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n");?>
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<!-- Created by Digital -->
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157
src/main/dig/hdl/TinyFPGA_BX_SOS.dig
Normal file
157
src/main/dig/hdl/TinyFPGA_BX_SOS.dig
Normal file
@ -0,0 +1,157 @@
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<?xml version="1.0" encoding="utf-8"?>
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<circuit>
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<version>1</version>
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<attributes/>
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<visualElements>
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<visualElement>
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<elementName>Counter</elementName>
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<elementAttributes>
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<entry>
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<string>Bits</string>
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<int>26</int>
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</entry>
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</elementAttributes>
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<pos x="220" y="140"/>
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</visualElement>
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<visualElement>
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<elementName>VDD</elementName>
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<elementAttributes/>
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<pos x="200" y="120"/>
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</visualElement>
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<visualElement>
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<elementName>Ground</elementName>
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<elementAttributes/>
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<pos x="200" y="200"/>
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</visualElement>
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<visualElement>
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<elementName>Clock</elementName>
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<elementAttributes>
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<entry>
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<string>Label</string>
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<string>CLK</string>
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</entry>
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<entry>
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<string>Frequency</string>
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<int>2147483647</int>
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</entry>
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<entry>
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<string>runRealTime</string>
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<boolean>true</boolean>
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</entry>
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</elementAttributes>
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<pos x="180" y="160"/>
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</visualElement>
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<visualElement>
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<elementName>Splitter</elementName>
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<elementAttributes>
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<entry>
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<string>Input Splitting</string>
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<string>26</string>
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</entry>
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<entry>
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<string>Output Splitting</string>
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<string>21-25</string>
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</entry>
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</elementAttributes>
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<pos x="320" y="140"/>
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</visualElement>
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<visualElement>
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<elementName>ROM</elementName>
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<elementAttributes>
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<entry>
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<string>Label</string>
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<string>SOS</string>
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</entry>
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<entry>
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<string>AddrBits</string>
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<int>5</int>
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</entry>
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<entry>
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<string>Data</string>
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<data>0,1,0,1,0,1,0,1,1,1,0,1,1,1,0,1,1,1,0,1,0,1,0,1</data>
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</entry>
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</elementAttributes>
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<pos x="380" y="140"/>
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</visualElement>
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<visualElement>
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<elementName>VDD</elementName>
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<elementAttributes/>
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<pos x="360" y="160"/>
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</visualElement>
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<visualElement>
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<elementName>Out</elementName>
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<elementAttributes>
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<entry>
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<string>Label</string>
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<string>LED</string>
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</entry>
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</elementAttributes>
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<pos x="480" y="160"/>
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</visualElement>
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<visualElement>
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<elementName>Out</elementName>
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<elementAttributes>
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<entry>
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<string>Label</string>
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<string>USBPU</string>
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</entry>
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</elementAttributes>
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<pos x="480" y="200"/>
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</visualElement>
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<visualElement>
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<elementName>Ground</elementName>
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<elementAttributes/>
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<pos x="460" y="220"/>
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</visualElement>
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</visualElements>
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<wires>
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<wire>
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<p1 x="180" y="160"/>
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<p2 x="220" y="160"/>
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</wire>
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<wire>
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<p1 x="440" y="160"/>
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<p2 x="480" y="160"/>
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</wire>
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<wire>
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<p1 x="200" y="180"/>
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<p2 x="220" y="180"/>
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</wire>
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<wire>
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<p1 x="360" y="180"/>
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<p2 x="380" y="180"/>
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</wire>
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<wire>
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<p1 x="460" y="200"/>
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<p2 x="480" y="200"/>
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</wire>
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<wire>
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<p1 x="280" y="140"/>
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<p2 x="320" y="140"/>
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</wire>
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<wire>
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<p1 x="340" y="140"/>
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<p2 x="380" y="140"/>
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</wire>
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<wire>
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<p1 x="200" y="140"/>
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<p2 x="220" y="140"/>
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</wire>
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<wire>
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<p1 x="200" y="120"/>
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<p2 x="200" y="140"/>
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</wire>
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<wire>
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<p1 x="200" y="180"/>
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<p2 x="200" y="200"/>
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</wire>
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<wire>
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<p1 x="360" y="160"/>
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<p2 x="360" y="180"/>
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</wire>
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<wire>
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<p1 x="460" y="200"/>
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<p2 x="460" y="220"/>
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</wire>
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</wires>
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</circuit>
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@ -73,6 +73,8 @@ public class OSExecute {
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* @return this for chained calls
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*/
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public OSExecute setTimeOutSec(int timeOutSec) {
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if (timeOutSec == 0)
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timeOutSec = Integer.MAX_VALUE;
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this.timeOutSec = timeOutSec;
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return this;
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}
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@ -195,9 +197,11 @@ public class OSExecute {
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public void run() {
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try {
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String result = os.startAndWait();
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callback.processTerminated(result);
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if (callback != null)
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callback.processTerminated(result);
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} catch (Exception e) {
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callback.exception(e);
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if (callback != null)
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callback.exception(e);
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}
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}
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}
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@ -134,8 +134,6 @@ public class Context {
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* @throws HGSEvalException HGSEvalException
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*/
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public Context declareVar(String name, Object value) throws HGSEvalException {
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if (map.containsKey(name))
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throw new HGSEvalException("Variable '" + name + "' already declared!");
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map.put(name, value);
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return this;
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}
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@ -32,9 +32,6 @@ public class ReferenceToArray implements Reference {
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final HGSArray array = Value.toArray(parent.get(context));
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if (i < 0 || i > array.hgsArraySize())
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throw new HGSEvalException("Index out of bounds: " + i);
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if (i < array.hgsArraySize())
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throw new HGSEvalException("Array field redeclared: " + i);
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array.hgsArrayAdd(initial);
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}
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@ -31,9 +31,6 @@ public class ReferenceToStruct implements Reference {
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@Override
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public void declareVar(Context context, Object initial) throws HGSEvalException {
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final HGSMap hgsMap = Value.toMap(parent.get(context));
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if (hgsMap.hgsMapGet(name) != null)
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throw new HGSEvalException("Value '" + name + "' redeclared in struct!");
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hgsMap.hgsMapPut(name, initial);
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}
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@ -11,8 +11,10 @@ package de.neemann.digital.ide;
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public class Command {
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private final String name;
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private final boolean filter;
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private final boolean gui;
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private final String requires;
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private final String[] args;
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private final int timeout;
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/**
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* Creates a new command
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@ -20,13 +22,17 @@ public class Command {
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* @param name the name of the command
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* @param requires the hdl which is required, either "verilog" of "vhdl"
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* @param filter the true, the commands args are filtered
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* @param gui if true the appp has a gui
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* @param timeout the timeout value in sec
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* @param args the arguments
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*/
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public Command(String name, String requires, boolean filter, String... args) {
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public Command(String name, String requires, boolean filter, boolean gui, int timeout, String... args) {
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this.name = name;
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this.requires = requires;
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this.timeout = timeout;
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this.args = args;
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this.filter = filter;
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this.gui = gui;
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}
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/**
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@ -63,4 +69,18 @@ public class Command {
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public boolean isFilter() {
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return filter;
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}
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/**
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* @return true if application has a gui
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*/
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public boolean isGui() {
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return gui;
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}
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/**
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* @return timeout in seconds
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*/
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public int getTimeout() {
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return timeout;
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}
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}
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@ -7,7 +7,7 @@ package de.neemann.digital.ide;
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import com.thoughtworks.xstream.XStream;
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import com.thoughtworks.xstream.io.xml.StaxDriver;
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import de.neemann.digital.core.extern.ProcessStarter;
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import de.neemann.digital.builder.tt2.OSExecute;
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import de.neemann.digital.draw.elements.Circuit;
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import de.neemann.digital.draw.library.ElementLibrary;
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import de.neemann.digital.gui.SaveAsHelper;
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@ -20,6 +20,8 @@ import de.neemann.digital.hdl.verilog2.VerilogGenerator;
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import de.neemann.digital.hdl.vhdl2.VHDLGenerator;
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import de.neemann.digital.lang.Lang;
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import de.neemann.gui.ErrorMessage;
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import org.slf4j.Logger;
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import org.slf4j.LoggerFactory;
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import javax.swing.*;
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import java.awt.event.ActionEvent;
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@ -30,6 +32,7 @@ import java.util.ArrayList;
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* Used to create the IDE integration
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*/
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public final class Configuration {
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private static final Logger LOGGER = LoggerFactory.getLogger(Configuration.class);
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/**
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* Loads a configuration
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@ -66,6 +69,8 @@ public final class Configuration {
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xStream.aliasAttribute(Command.class, "name", "name");
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xStream.aliasAttribute(Command.class, "requires", "requires");
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xStream.aliasAttribute(Command.class, "filter", "filter");
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xStream.aliasAttribute(Command.class, "gui", "gui");
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xStream.aliasAttribute(Command.class, "timeout", "timeout");
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xStream.addImplicitCollection(Command.class, "args", "arg", String.class);
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xStream.alias("file", FileToCreate.class);
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xStream.aliasAttribute(FileToCreate.class, "name", "name");
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@ -236,7 +241,7 @@ public final class Configuration {
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}
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}
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if (args != null)
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getIoInterface().startProcess(digFile.getParentFile(), args);
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getIoInterface().startProcess(command, digFile.getParentFile(), command.isGui(), args);
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} catch (Exception e) {
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getIoInterface().showError(command, e);
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}
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@ -308,11 +313,13 @@ public final class Configuration {
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/**
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* Starts a process
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*
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* @param dir the folder to start the process in
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* @param args the arguments
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* @param command the command started
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* @param dir the folder to start the process in
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* @param gui true if app has a gui
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* @param args the arguments
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* @throws IOException IOException
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*/
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void startProcess(File dir, String[] args) throws IOException;
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void startProcess(Command command, File dir, boolean gui, String[] args) throws IOException;
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/**
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* Shows an error message
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@ -330,14 +337,30 @@ public final class Configuration {
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final File parentFile = filename.getParentFile();
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if (!parentFile.exists()) {
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if (!parentFile.mkdirs())
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throw new IOException("could not create "+parentFile);
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throw new IOException("could not create " + parentFile);
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}
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return new FileOutputStream(filename);
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}
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@Override
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public void startProcess(File dir, String[] args) throws IOException {
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ProcessStarter.start(dir, args);
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public void startProcess(Command command, File dir, boolean gui, String[] args) throws IOException {
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OSExecute os = new OSExecute(args)
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.setTimeOutSec(command.getTimeout())
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.setWorkingDir(dir);
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if (gui)
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os.startInThread(new OSExecute.ProcessCallback() {
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@Override
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public void processTerminated(String consoleOut) {
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LOGGER.info("process '" + command.getName() + "' says:\n" + consoleOut);
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}
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@Override
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public void exception(Exception e) {
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showError(command, e);
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}
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});
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else
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os.startAndWait();
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}
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@Override
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@ -75,7 +75,7 @@ public class VerilogSimulatorTest extends TestCase {
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File examples = new File(Resources.getRoot(), "../../main/dig/hdl");
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try {
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int tested = new FileScanner(this::checkVerilogExport).noOutput().scan(examples);
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assertEquals(1, tested);
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assertEquals(2, tested);
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assertEquals(1, testBenches);
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} catch (FileScanner.SkipAllException e) {
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// if iverilog is not installed its also ok
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@ -68,7 +68,7 @@ public class VHDLSimulatorTest extends TestCase {
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File examples = new File(Resources.getRoot(), "../../main/dig/hdl");
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try {
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int tested = new FileScanner(this::checkVHDLExport).noOutput().scan(examples);
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assertEquals(1, tested);
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assertEquals(2, tested);
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assertEquals(1, testBenches);
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} catch (FileScanner.SkipAllException e) {
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// if ghdl is not installed its also ok
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@ -117,7 +117,7 @@ public class ConfigurationTest extends TestCase {
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}
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@Override
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public void startProcess(File dir, String[] args) {
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public void startProcess(Command command, File dir, boolean gui, String[] args) {
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commands.add(new StartedCommand(dir, args));
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}
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@ -32,7 +32,7 @@ public class TestExamples extends TestCase {
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*/
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public void testDistExamples() throws Exception {
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File examples = new File(Resources.getRoot().getParentFile().getParentFile(), "/main/dig");
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assertEquals(252, new FileScanner(this::check).scan(examples));
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assertEquals(253, new FileScanner(this::check).scan(examples));
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assertEquals(171, testCasesInFiles);
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}
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