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added a .gitignore file to the processor example folder

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hneemann 2019-09-21 12:34:44 +02:00
parent 73efa41e1d
commit bb7d24e4e2
3 changed files with 25 additions and 10 deletions
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3
src/main/dig/processor/.gitignore vendored Normal file
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@ -0,0 +1,3 @@
*.vhdl
*.xdc
vivado

21
src/main/dig/processor/HDLExample.dig
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@ -343,16 +343,6 @@
</elementAttributes>
<pos x="920" y="260"/>
</visualElement>
<visualElement>
<elementName>Text</elementName>
<elementAttributes>
<entry>
<string>Description</string>
<string>Board: BASYS3</string>
</entry>
</elementAttributes>
<pos x="400" y="200"/>
</visualElement>
<visualElement>
<elementName>Testcase</elementName>
<elementAttributes>
@ -562,6 +552,17 @@ end loop
</elementAttributes>
<pos x="1220" y="460"/>
</visualElement>
<visualElement>
<elementName>Text</elementName>
<elementAttributes>
<entry>
<string>Description</string>
<string>Pin numbers are defined to match the BASYS3 FPGA board.
{{de Die Pin-Nummern sind definiert für ein BASYS3 FPGA Board.}}</string>
</entry>
</elementAttributes>
<pos x="400" y="140"/>
</visualElement>
</visualElements>
<wires>
<wire>

11
src/main/dig/processor/VGAExample.dig
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@ -1040,6 +1040,17 @@
</elementAttributes>
<pos x="720" y="620"/>
</visualElement>
<visualElement>
<elementName>Text</elementName>
<elementAttributes>
<entry>
<string>Description</string>
<string>Pin numbers are defined to match the BASYS3 FPGA board.
{{de Die Pin-Nummern sind definiert für ein BASYS3 FPGA Board.}}</string>
</entry>
</elementAttributes>
<pos x="280" y="160"/>
</visualElement>
</visualElements>
<wires>
<wire>