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Express shamt_i in terms of XLEN.
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@ -54,7 +54,7 @@ sb & rs2, imm(rs1) & \hyperref[insnformat:stype]{S} & \hyperref[insn:sb]{Stor
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sh & rs2, imm(rs1) & \hyperref[insnformat:stype]{S} & \hyperref[insn:sh]{Store Halfword} & {\tt m16(rs1+\hyperref[imm.s:decode]{imm\_s}) $\leftarrow$ rs2[15:0], pc $\leftarrow$ pc+4}\\
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sh & rs2, imm(rs1) & \hyperref[insnformat:stype]{S} & \hyperref[insn:sh]{Store Halfword} & {\tt m16(rs1+\hyperref[imm.s:decode]{imm\_s}) $\leftarrow$ rs2[15:0], pc $\leftarrow$ pc+4}\\
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sll & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:sll]{Shift Left Logical} & {\tt rd $\leftarrow$ rs1 << (rs2\&0x1f), pc $\leftarrow$ pc+4}\\
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sll & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:sll]{Shift Left Logical} & {\tt rd $\leftarrow$ rs1 << (rs2\%XLEN), pc $\leftarrow$ pc+4}\\
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\hline
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slli & rd, rs1, shamt & \hyperref[insnformat:itype]{I} & \hyperref[insn:slli]{Shift Left Logical Immediate} & {\tt rd $\leftarrow$ rs1 << \hyperref[shamt.i:decode]{shamt\_i}, pc $\leftarrow$ pc+4}\\
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slli & rd, rs1, shamt & \hyperref[insnformat:itype]{I} & \hyperref[insn:slli]{Shift Left Logical Immediate} & {\tt rd $\leftarrow$ rs1 << \hyperref[shamt.i:decode]{shamt\_i}, pc $\leftarrow$ pc+4}\\
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@ -66,11 +66,11 @@ sltiu & rd, rs1, imm & \hyperref[insnformat:itype]{I} & \hyperref[insn:sltiu]{S
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sltu & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:sltu]{Set Less Than Unsigned} & {\tt rd $\leftarrow$ (rs1 < rs2) ? 1 : 0, pc $\leftarrow$ pc+4}\\
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sltu & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:sltu]{Set Less Than Unsigned} & {\tt rd $\leftarrow$ (rs1 < rs2) ? 1 : 0, pc $\leftarrow$ pc+4}\\
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\hline
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sra & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:sra]{Shift Right Arithmetic} & {\tt rd $\leftarrow$ rs1 >> (rs2\&0x1f), pc $\leftarrow$ pc+4}\\
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sra & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:sra]{Shift Right Arithmetic} & {\tt rd $\leftarrow$ rs1 >> (rs2\%XLEN), pc $\leftarrow$ pc+4}\\
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\hline
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srai & rd, rs1, shamt & \hyperref[insnformat:itype]{I} & \hyperref[insn:srai]{Shift Right Arithmetic Immediate} & {\tt rd $\leftarrow$ rs1 >> \hyperref[shamt.i:decode]{shamt\_i}, pc $\leftarrow$ pc+4}\\
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srai & rd, rs1, shamt & \hyperref[insnformat:itype]{I} & \hyperref[insn:srai]{Shift Right Arithmetic Immediate} & {\tt rd $\leftarrow$ rs1 >> \hyperref[shamt.i:decode]{shamt\_i}, pc $\leftarrow$ pc+4}\\
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\hline
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\hline
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srl & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:srl]{Shift Right Logical} & {\tt rd $\leftarrow$ rs1 >> (rs2\&0x1f), pc $\leftarrow$ pc+4}\\
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srl & rd, rs1, rs2 & \hyperref[insnformat:rtype]{R} & \hyperref[insn:srl]{Shift Right Logical} & {\tt rd $\leftarrow$ rs1 >> (rs2\%XLEN), pc $\leftarrow$ pc+4}\\
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\hline
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\hline
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srli & rd, rs1, shamt & \hyperref[insnformat:itype]{I} & \hyperref[insn:srli]{Shift Right Logical Immediate} & {\tt rd $\leftarrow$ rs1 >> \hyperref[shamt.i:decode]{shamt\_i}, pc $\leftarrow$ pc+4}\\
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srli & rd, rs1, shamt & \hyperref[insnformat:itype]{I} & \hyperref[insn:srli]{Shift Right Logical Immediate} & {\tt rd $\leftarrow$ rs1 >> \hyperref[shamt.i:decode]{shamt\_i}, pc $\leftarrow$ pc+4}\\
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@ -622,10 +622,12 @@ to form the \verb@imm_i@ value.
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\end{figure}
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\end{figure}
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A special case of the I-type is used for shift-immediate instructions
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A special case of the I-type is used for shift-immediate instructions
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where only five bits of the imm field are used to represent the number
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where the imm field is used to represent the number of bit positions
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of bit positions to shift as shown in \autoref{Figure:shamt_i_type_decode}.
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to shift as shown in \autoref{Figure:shamt_i_type_decode}.
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In this variation, the least significant five bits of the imm field are
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In this variation, the least significant five bits of the imm field are
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zero-extended to form the \verb@shamt_i@ value.
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zero-extended to form the \verb@shamt_i@
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value.\footnote{When XLEN is 64 or 128, the {\tt shamt\_i} field will
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consist of 6 or 7 bits respectively.}
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\begin{figure}[ht]
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\begin{figure}[ht]
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\centering
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\centering
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