Shiraz Hashim
f28e5c946d
SPEAr: Correct SoC ID offset in misc configuration space ...
SoC Core ID offset is 0x30 in miscellaneous configuration address
space. It was wrongly mentioned as periph2 clk enable.
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07 14:07:42 +02:00
2012-07-07 14:07:35 +02:00
2011-09-07 21:46:40 +02:00
2012-03-19 00:08:26 +01:00
2012-07-07 14:07:30 +02:00
2012-02-12 10:11:33 +01:00
2012-07-07 14:07:25 +02:00
2012-03-26 23:09:26 +02:00
2012-07-07 14:07:33 +02:00
2012-05-15 08:31:21 +02:00
2011-08-04 13:56:55 +02:00
2012-05-25 10:36:29 +02:00
2012-07-07 14:07:25 +02:00
2012-05-15 08:31:34 +02:00
2012-02-12 10:11:26 +01:00
2012-07-07 14:07:27 +02:00
2012-02-27 21:19:25 +01:00
2012-04-16 14:53:59 +02:00
2012-07-07 14:07:34 +02:00
2012-07-07 14:07:35 +02:00
2012-07-07 14:07:35 +02:00
2012-02-12 10:11:28 +01:00
2011-11-03 22:56:22 +01:00
2011-12-11 14:41:14 +01:00
2011-08-04 23:34:02 +02:00
2012-07-07 14:07:25 +02:00
2012-07-07 14:07:42 +02:00
2012-07-07 14:07:21 +02:00
2011-11-15 22:25:50 +01:00
2012-03-27 22:05:29 +02:00
2011-10-23 20:50:42 +02:00
2011-11-29 15:43:38 +01:00
2012-02-12 10:11:31 +01:00
2012-07-07 14:07:35 +02:00
2011-10-26 21:37:17 +02:00
2012-01-09 20:10:32 -06:00
2012-05-15 08:31:26 +02:00
2011-11-15 22:25:50 +01:00
2012-07-07 14:07:23 +02:00
2011-09-13 08:25:15 +02:00
2011-12-09 17:30:09 +01:00
2012-05-15 17:32:05 -05:00
f28e5c946d