Commit Graph

  • fbcd7b65ed Make use of & consistent in the jalr instruction master John Winans 2024-07-28 14:35:55 -05:00
  • 8a08baee9a Improve wording in 'subtracting unsigned numbers' v0.18.3 John Winans 2024-04-23 05:50:47 -05:00
  • 40827eaecf Correct the spelling of 'adder' John Winans 2024-04-23 05:43:30 -05:00
  • 43fe02e83d
    Merge pull request #7 from vazhnov/Fix_typo_register John Winans 2023-06-12 06:45:43 -05:00
  • c33a86fc13 Fix a typo in chapter "4.2.4 Adding a 12-bit Signed Value": t1 → t0 Alexey Vazhnov 2023-04-05 00:09:24 +02:00
  • 53209b567f refcard coverpage cosmetic John Winans 2022-10-20 06:39:20 -05:00
  • 4425465d1f Add a title page to tri-fold refcard John Winans 2022-10-19 10:21:50 -05:00
  • 23bd3addb1 Add ribbon diagrams to tri-fold refcard Change refcard boolean operators for better readability v0.18.1 John Winans 2022-10-19 09:34:25 -05:00
  • 608f242525 Refactor insn boxes and add proper green-card v0.18 John Winans 2022-10-16 21:02:18 -05:00
  • 325b3fb036 Stub in labels for csr instructions John Winans 2022-10-16 20:59:50 -05:00
  • 78969cc2a3 ABI grouping is likely due to E and C extensions. John Winans 2022-10-07 06:39:51 -05:00
  • 8eeb353636 imm_j and imm_b can only be even v0.17 John Winans 2022-10-07 06:11:59 -05:00
  • a44a1fcd6f XLEN can be 128 bits too. John Winans 2022-10-07 05:46:06 -05:00
  • e50440cf77
    Update README.md John Winans 2022-10-07 05:45:34 -05:00
  • 0b3378cda7
    Merge pull request #4 from phyBrackets/patch-1 John Winans 2022-10-07 05:40:14 -05:00
  • 6621153fa1
    Merge pull request #5 from asahsieh/master John Winans 2022-10-07 05:38:34 -05:00
  • 9fda4488bc Fix a typo in the title ASaHsieh 2022-07-28 15:58:15 +08:00
  • 521ba1fe59
    update with XLEN definition. Shivam 2022-07-24 01:46:54 +05:30
  • 9de91452f2 Improve clarity of the LI and LA pseudo instructions v0.16 John Winans 2022-04-18 10:28:47 -05:00
  • cec208933c Clarify magnitude comparison logic for IEEE-754 v0.15 John Winans 2022-01-26 11:39:01 -06:00
  • 5bc8807ff2
    Use https for giuthub link to rvalp.git (as opposed to ssh.) John Winans 2021-07-06 13:46:08 -05:00
  • f6433f5f78
    Update README.md v0.14 John Winans 2021-06-29 20:55:34 -05:00
  • 2b1f4592a1 Add python, multilib & qemu install notes John Winans 2021-06-29 20:50:07 -05:00
  • f0b1caaa64 Bump Ubuntu to 20.04 & add links to lectures. John Winans 2021-06-29 20:47:44 -05:00
  • 6b23ffd1ab Rephrase how lengths are determined for shift insns v0.13 John Winans 2021-06-19 13:51:49 -05:00
  • 06c70cb33f Redesign the diagram for creating the shamt_i value John Winans 2021-06-19 13:43:30 -05:00
  • 6f2b427bb5 Add package scrextend so can compress redundant footnotes John Winans 2021-06-19 13:42:41 -05:00
  • 9c65ca79d2 Correct numeric range (Thanks @Cody Erpelding) John Winans 2021-04-22 08:53:32 -05:00
  • fa0c14d767 Change lb to lbu in lbu instruction example John Winans 2021-03-20 07:37:45 -05:00
  • 642a664e27 Comment on instructions in $pcrel_hi/lo examples John Winans 2021-03-05 14:08:17 -06:00
  • adbcd27a43 Add leading zeros to literals to eliminate sign confusion John Winans 2021-03-05 13:53:45 -06:00
  • 6e0bb98500 Update RISC-V toolchain last tested date & version info. John Winans 2021-03-05 13:47:59 -06:00
  • 5df1fff716 Mislabeled sign of 8 in subtraction example. v0.12 John Winans 2021-03-03 07:58:24 -06:00
  • 9b43fefe01 Rewrite section describing big/little-endian v0.11.2 John Winans 2021-02-12 12:35:54 -06:00
  • 21bb90cd7d Rename the target file to: rvalp.pdf John Winans 2021-02-12 08:37:53 -06:00
  • e5af5622dd Make consistent the use of 'pseudoinstruction' v0.11.1 John Winans 2021-02-11 15:11:44 -06:00
  • cda9d96127 Rewrite pseudo ops, relocation, and relaxation v0.11 John Winans 2021-02-11 14:16:41 -06:00
  • 67ea29c8d9 Compress the size of the register use/ABI table John Winans 2021-02-11 14:16:21 -06:00
  • 49289fcbfa Add more insn examples and refs to shifting John Winans 2021-02-10 21:09:09 -06:00
  • bb6d7e1429 Add a label for referencing shifting John Winans 2021-02-10 21:08:38 -06:00
  • 354c348972 Add hrefs for memory refs & XLEN John Winans 2021-02-10 17:06:08 -06:00
  • 3e1c10a153 Fix ambiguous hex values, add XLEN label John Winans 2021-02-10 17:05:31 -06:00
  • 4ba38dca4f Remove fence (no longer part of the I/base module) John Winans 2021-02-10 16:39:28 -06:00
  • 03b126723c Add notes on li psudo-instruiction details. v0.10.1 John Winans 2020-11-25 08:20:17 -06:00
  • 4e06b1e81a Correct spelling of csrrsi & csrrci v0.10.0 John Winans 2020-10-23 18:00:50 -05:00
  • 95f74223fa Add CSRxx insns to encoding table John Winans 2020-10-23 17:56:55 -05:00
  • 2f04f5a632 Turn left-margin line numbers on. v0.9.3 John Winans 2020-10-19 15:56:46 -05:00
  • dd1026f71a Correct lh to lw in code lw example. John Winans 2020-10-19 14:59:39 -05:00
  • 3700cd676c Correct a typo in example of the 'lui' instruction v0.9.2 John Winans 2020-10-16 10:17:45 -05:00
  • f059853d06 Consistent operand names btw reference & encoding. v0.9.1 John Winans 2020-10-12 11:58:24 -05:00
  • 2e5c2bcb3d Fix malformed link for jal in insn encoding table . v0.9 John Winans 2020-10-12 09:48:08 -05:00
  • 91aec1a29c Add definition links for pcrel_13 and pcrel_21. John Winans 2020-10-12 09:44:49 -05:00
  • 2a6886e778 Add insn templates to encoding table diagram v0.8 John Winans 2020-10-10 10:33:08 -05:00
  • 8a7e8c9917 Alt mantissa to significand, ref spec for specials v0.7.4 John Winans 2020-09-04 08:17:05 -05:00
  • 91d585d63f Change unsigned to signed :-/ v0.7.3 John Winans 2020-09-03 14:15:36 -05:00
  • 0fc3eb4039 Fix operand bit length in unsigned 3-4 example v0.7.2 John Winans 2020-09-03 12:26:25 -05:00
  • 9613886753 Correct addend in 127+1 example of signed overflow v0.7.1 John Winans 2020-08-31 09:23:15 -05:00
  • 3c32f91de7 Fix signedness in the floating point example. v0.7 John Winans 2020-08-18 19:24:29 -05:00
  • 7fb7c015bf Spell IEEE-754 consistently. John Winans 2020-08-18 18:56:52 -05:00
  • 7ebde15709 Cleanup signed, unsigned, adding, & overflow John Winans 2020-08-18 16:04:52 -05:00
  • 90744ac90d Add FA truth table to binary addition example John Winans 2020-08-16 15:15:28 -05:00
  • aaab515b5a Express shamt_i in terms of XLEN. v0.6 John Winans 2020-03-12 14:16:29 -05:00
  • c72e9aa7e6 And-mask the 5 LSbs of rs2 in r-type shift insns John Winans 2020-03-12 14:03:16 -05:00
  • 2b866b92c3 Fix copy & paste typos. John Winans 2020-03-11 10:47:47 -05:00
  • b27517cef8 Wording and format cleanup. John Winans 2020-03-11 10:47:31 -05:00
  • 70d9744528 Show the MSbs of the fence instruction as 0000 John Winans 2020-03-10 11:46:04 -05:00
  • 4992be5473 Mention pcrel_21/13 & describe jal w/pcrel_21 John Winans 2020-03-10 11:29:20 -05:00
  • 34ff94a932 Chean up discussion of instruction formats. John Winans 2020-03-10 11:10:06 -05:00
  • 176d2e851c 86 the line numbers. John Winans 2020-03-10 11:09:25 -05:00
  • c4bc8ce06b Change imm to pcrel or imm(rs1) where appropriate. John Winans 2020-03-10 11:07:58 -05:00
  • 9da21a2708
    Add a link to the releases page with a note to find PDF files there. John Winans 2020-03-09 11:16:28 -05:00
  • d7e81c887c Comment-out the unwritten toolchain usage chapter. v0.5 John Winans 2020-03-09 11:03:01 -05:00
  • a591d96def Factor out rv32 base instruction details. John Winans 2020-03-09 08:52:54 -05:00
  • 7366f52b42 Update the copyright. John Winans 2020-03-08 21:12:25 -05:00
  • 1bc441a4a2 Add minimal insn descriptions to the Instruction Encoding Formats section. John Winans 2020-03-08 21:00:37 -05:00
  • 22a6c225ab Change the instruction labels from insn:xxx to uguide:xxx. John Winans 2020-03-08 20:59:59 -05:00
  • 62effa0046 Add hypcap=true on the caption package. John Winans 2020-03-08 20:59:16 -05:00
  • 9aefc6131f Test factoring out the instruction details from the rv32 chapter. John Winans 2020-03-06 14:27:09 -06:00
  • fe4b1434cf Stub in includes for priv & rv32m instructions. John Winans 2020-03-06 14:26:35 -06:00
  • 552bf30a5c Factor out priv & rv32m instructions. John Winans 2020-03-06 14:25:34 -06:00
  • 9371b06d6b lean up TOC & add links to the index. John Winans 2020-03-06 14:23:55 -06:00
  • 84f7eea404 Correct a link to b-format instructions. John Winans 2020-03-06 14:22:35 -06:00
  • 1a4abf5c3e More diagram tinkering to improve readability. John Winans 2020-02-23 11:05:09 -06:00
  • 108bc09205 Tinker with arrowheads on insnbox diagrams. John Winans 2020-02-23 10:41:35 -06:00
  • fa39de17f6 Move bulky instrution set reference to ref-card John Winans 2020-02-23 09:53:02 -06:00
  • 9559aeaffa Relabel imm_x figs so letters in same place for all source reg examples. John Winans 2020-02-18 22:14:50 -06:00
  • ecf3e17ac5 Added imm index entries (commented out because underscores don't work) John Winans 2020-02-18 08:12:40 -06:00
  • 3a8f8d0e3e Clean up shamt_i decoding diagram. John Winans 2020-02-17 17:37:31 -06:00
  • a75eca5f5c Add notes about the use of bit #30 in the add/sub & sr insns. John Winans 2020-02-17 17:30:17 -06:00
  • 0f87512cf9 CLean up instruction format links from refcard. John Winans 2020-02-17 17:18:42 -06:00
  • 902524b244 Add missing imm subfield hairlines for B and J sign bits. John Winans 2020-02-17 06:41:06 -06:00
  • 55cb675205 Added immediate-field decoding diagrams for all instruction types. John Winans 2020-02-16 23:28:46 -06:00
  • 8746aad3f0 Clean up J type instruction decoding diagram. John Winans 2020-02-16 21:13:09 -06:00
  • 8c15079ac6 Add Base Instruction Set Encoding table (from RISC-V ISM) John Winans 2020-02-08 08:57:02 -06:00
  • 9a22b3d849 Added some 'fix' notes regarding overflows. v0.4 John Winans 2020-02-05 14:47:31 -06:00
  • 36a0ba2554 Add a missing parenthesis in slt instruction description. John Winans 2020-02-05 14:47:04 -06:00
  • af6327e220 Word smithing repairs to binary number chapter. John Winans 2019-09-10 17:02:42 -05:00
  • 8eabe7ae0d Cosmetic cleanup. John Winans 2019-09-02 08:09:45 -05:00
  • 9eed875eb8 Spell abridged correctly. John Winans 2019-09-02 07:23:58 -05:00
  • 901e5c1752 Rephrase instruction fetch-decode-execute description. John Winans 2019-09-01 20:04:11 -05:00